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Inventi Impact: VLSI

Articles

  • Inventi:evs/25/11
    NOVEL VLSI ALGORITHM AND ARCHITECTURE WITH GOOD QUANTIZATION PROPERTIES FOR A HIGH-THROUGHPUT AREA EFFICIENT SYSTOLIC ARRAY IMPLEMENTATION OF DCT
    30-Jun-2011 Research 2011 : July - September
    Doru Florin Chiper, Paul Ungureanu

    Using a specific input-restructuring sequence, a new VLSI algorithm and architecture have been derived for a high throughput memory-based systolic array VLSI implementation of a discrete cosine transform. The proposed restructuring technique transforms the DCT algorithm into a cycle-convolution and a pseudo-cycle convolution structure as basic computational forms. The proposed solution has been specially designed to have good fixed-point error performances that have been exploited to further reduce the hardware complexity and power consumption. It leads to a ROM based VLSI kernel with good quantization properties. A parallel VLSI algorithm and architecture with a good fixed point implementation appropriate for a memory-based implementation have been obtained. The proposed algorithm can be mapped onto two linear systolic arrays with similar length and form. They can be further efficiently merged into a single array using an appropriate hardware sharing technique. A highly efficient VLSI chip can be thus obtained with appealing features as good architectural topology, processing speed, hardware complexity and I/O costs. Moreover, the proposed solution substantially reduces the hardware overhead involved by the pre-processing stage that for short length DCT consumes an important percentage of the chip area

    How to Cite this Article
    CC Compliant Citation: Doru Florin Chiper and Paul Ungureanu,\r\nNovel VLSI Algorithm and Architecture with Good Quantization\r\nProperties for a High-Throughput Area Efficient Systolic Array\r\nImplementation of DCT, Hindawi Publishing Corporation EURASIP\r\nJournal on Advances in Signal Processing Volume 2011, Article ID\r\n639043
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